1. Field of the Invention
This invention relates to a switching element, a semiconductor device and a method of manufacturing the same, and more particularly relates to a switching element having a channel region between main electrodes, a semiconductor device including such a switching element, and a method of manufacturing the switching element and semiconductor device.
2. Description of the Related Art
The more extensively semiconductor devices are integrated, the more micro-fabricated wiring patterns are required for large scale integrated circuits, transistor elements, wire connections and so on. In order to promote micro-fabrication of wiring patterns, wires should be not only scaled down but also be precisely designed, sized and arranged. Especially, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) should be extensively scaled down and more precisely fabricated. Therefore, a great amount of load is placed on the lithography process which directly affects the minimum size and the precision of the fabricated pattern. In addition, as lithography technology account for the most of mass production cost of semiconductor devices, the improvement of the precision in fabricating patterns along with the reduction of the size leads to increase the cost of semiconductor devices.
In order to substantially overcome problems related to the foregoing top-down type micro-fabrication technique, the following two references have proposed the bottom-up type micro-fabrication techniques. In the references, the desired molecular architecture is artificially synthesized, and elements having uniform attributes are produced using uniform molecules. However, in order to put the foregoing technique into practical use, there are a number of problems related to arrangement of synthesized molecules at desired positions, electric connections between arranged electrodes and wirings, and so on. The references are Domestic Re-Publication of PCT International Application No. 2004-537846 (called the “Reference 1”) and Ö. T. ürel and K. Likharev, “Cross Nets: Possible Neuromorphic Networks based on Nanoscale Component”, Int. J. of Circuit Theory and Appl. 31, pp. 37-53 (2003) (called the “Reference 2”).
With the foregoing top-down type patterning method using the lithography process, more strong request have been made on improved fabrication sizes of components in order to accomplish finer micro-fabrication of patterns. This is very difficult to accomplish. On the contrary, the bottom-up type patterning method can easily satisfy the requirements for the improved fabrication sizes, but is difficult to put into practical use with respect to arrangement of micro-fabricated components at desired positions, and so on.